Hi Jason,
Thank you for providing this additional information. In working with previous customers we have found that Microchip's definition on the SPI modes is different from our definition. I am out of the office right now, so I am unable to download the entire datasheet at the moment. If you would like to look for yourself while I'm out of the office, you are looking for the definition of CKE and CPK settings that causes your processor to clock bits out on the falling edge of the clock and causes it to sample data on the rising edge of the clock.
If you are unable to find the correct settings, I will be happy to take a look at this when I return to the office tomorrow. Thank you again, for this information.
Your stall settings look fine to me.
Best regards, NevadaMark