Re: AD9837 Vout variation
Dear Sorry for very slow reply.Thank you very much for your help. Could I have your comments about followings? Regarding Vout maximum, it depends on the frequency, and the load etc.Vout maximum...
View ArticleRe: AD7324 sequencer
Hi, The /CS of the AD7324 initiates data transfer and conversion process. Once conversion is initiated , it requires 16 SCLK cycles to complete. On the 16th SCLK falling edge , the DOUT line returns to...
View ArticleSMC_ABE pins usage in BF609 SMC asynchronous reads
Hi,When read BF609 HRM 0.5 for SMC usage, it says as following The SMC does indirectly support 8-bit accesses through the additional byte enable signals SMC_ABE0 andSMC_ABE1. Some 16-bit memory systems...
View ArticleRe: TCP connection
Hmm..uploading from Linux is fine while from windows is slow, sounds strange, let me have a try first.
View ArticleRe: AD7689 VDD Power supply
Thanks, Maithil. >>The VREF on the page 13 and 14 referes to the external reference.So when using internal reference, I should not refer to graph on page 13 and 14?ADI recommends to connect over...
View ArticleRe: ADC7634 SCCS Pin
Hi, Gabriel. The datasheet states that “Two signals /CS and /RD control the interface. When at least one of these signals is high, the interface outputs are high impedance.” Also, when the software...
View ArticleRe: ADV7625 CSC in front of output
Hello Thank you for your advice.Asked product is ADV7625.I will check 9.10 HDMI TX COLOR SPACE CONVERTER.I would like to evaluate ADV7626 but my information is datasheet only.ADV7625 has some document...
View ArticleIs there a cross table "algorithm x device" ?
Hi, I'm using SigmaStudio 3.9 in Win8. When I use a ADAU1701, I don't find the "flanger" or "Reverb" algorithms in the toolbox. Is this right? Is there a cross table "algorithm x device"? Thanks,
View ArticleRe: noise of SSM2019
Hello Kou, The two noise pulses shown in slide 2 appear to be 20mS apart. Could they be related to the 50 Hz line frequency? Perhaps some nearby machinery, etc. is intermittently generating...
View ArticleRe: bf537-ezlite bfin_sport TDM read - Unbalanced enable for IRQ
You are right, it's a software workaround of a hardware anomaly, as stated inline, waiting for the last unit transfer to finish, however you can adjust the delay time by calculating/testing for your...
View ArticleRe: Determining if a BF537 is bad
OK, there is something off here, but I cannot really tell what it is. What you indicate is not necessarily misuse of the trace buffer. The trace buffer logs the last 16 discontinuities seen by the...
View ArticleRe: Is there a cross table "algorithm x device" ?
Hello Arturpc, You're correct, there's no flanger or reverb for the -1701. This DSP has 2K words of data memory, providing 42mS total delay @ 48KHz -- not enough to properly implement those...
View ArticleRe: Query about AD8370
Wayne, This is quite a detailed request. It will probably take me two weeks to complete this work. I'll keep you up to date on my progress, Steve
View ArticleRe: ADV7513 and bt.565 (PAL)
TO GuenterL,Sorry to trouble you, but I met some problems in using ADV7513 in my design.The condition is as following.Input data: YCbCr 4:2:2 format, 8bit color depth, embedded Sync, and ASP is 16:9,...
View ArticleRe: AD8021 distortion
Hi ldc, I also talked to our product expert regarding this and he gave few suggestions to be able to see the cause of the problem. Can you do the following: Remove the comp cap, and the feedback cap,...
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Re: ADV7513 and bt.565 (PAL)
To Sasa.Thanks for your suggestion.I tried a few times as your advice, and checked 0x42[6:5] = 0b11;while, the register 0x9E[4] was 0. That meas PLL Not Locked.Then, I checked the input clock and...
View ArticleRe: gpio-addr-flash: probe of gpio-addr-flash.0 failed with error -22
Kernel boot says:bfin-gpio: GPIO 26 is already reserved by BFIN-GPIO! (Documentation/blackfin/bfin-gpio-notes.txt)andbfin-gpio: GPIO 21 is already reserved by BFIN-GPIO!...
View Article"SD minimum luma vale" of ADV739x.
Hello, I have a question about "SD minimum luma vale" of ADV739x. There is a description about "SD minimum luma vale" on page.40 as follows:Address : 0x8A, SD Timing Register 0, Bit 6SD minimum luma...
View Articlead7705 bipolar inputs
hi all, now i'm working with bipolar inputs on ad7705. my question is: does it requires bipolar reference also? thanks,
View ArticleRe: What is SMC in BF60x
Hi Nabeel, Thanks for your reply.I am a little confused with the SCLK in SMC. In SMC, it says that"All memory control, address and data signals are driven out of chip with regard to the falling edgeof...
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