Hi Jet,
It can be done.
To do it I would suggest you use the 2013.4 Vivado tool chain as I think the ADI HDL code and associated tcl scripts were developed using this version. Otherwise you need to upgrade a pile of cores in the board design.
First of all build the hdl libraries used in the design via the tcl console scripts in the associated libraries.
Next run the project script in the projects directory. This should give you the associated bit file and sdk seed files.
Next open up the SDK by exporting the project in Vivado. Create an empty bare metal standalone app, call it sw. Now copy the ADI C source files into this project and build.
Now create a zynq FSBL app using the SDK menus. After that use the Zynq Create Boot Image tool in the SDK, placing the zynq FSBL (bootloader) first on the list, followed by the bit file (data file) and finally the sw app (data file) created from the ADI C source code.
Regards
Walter