rbrennan Could you send me the source code. I am using the ADF5356 eval board.
thanks.
my email is: harkati_lekhmissi@hotmail.com
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Re: ADF4355, ADF4355-2, ADF4355-3, ADF4356, ADF5355, and ADF5356 evaluation board control software
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AD7856 Example
Hello.
Is there a sample Arduino sketch that uses the AD7856 at its full or near full sampling rate?
I read the 2013 post on this device and the Arduino, but would benefit from a more concise and tested sample sketch.
Many thanks!
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Re: hi,i want to know where i can find avnet board definition files in vivado for AD9361+ZC7035?
hi, the above issue got resolved after running tcl files from the script folder.but now there is error while running one tcl file form script folder
adi_tquest,tcl
error :[common 17-170] Unknown option '-detail',please type 'report_timing -help' for usage info.
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Re: Building HDL AD9467 FMC-ZC706 in Vivado 2016.2
Hi Istvan,
1) Concerning the first question: yes, the system-wrapper.vi is generated automatically. I compiled again using “make” with the zed files and 14 errors came up because there were 14 non-existing ports in the system-wrapper.v.
In order to fix the instantiations with the wrapper, I removed the following definitions (were not defined in the system-wrapper.vi ) from system_wrapper i_system_wrapper of the top file.v:
.i2s_bclk (i2s_bclk),
.i2s_lrclk (i2s_lrclk),
.i2s_mclk (i2s_mclk),
.i2s_sdata_in (i2s_sdata_in),
.i2s_sdata_out (i2s_sdata_out),
.iic_fmc_scl_io (iic_scl),
.iic_fmc_sda_io (iic_sda),
.iic_mux_scl_i (iic_mux_scl_i_s),
.iic_mux_scl_o (iic_mux_scl_o_s),
.iic_mux_scl_t (iic_mux_scl_t_s),
.iic_mux_sda_i (iic_mux_sda_i_s),
.iic_mux_sda_o (iic_mux_sda_o_s),
.iic_mux_sda_t (iic_mux_sda_t_s),
.otg_vbusoc (otg_vbusoc),
Are these definitions important? I solved these errors that were commented to you but another one appeared:
error copying "ad9467_fmc_zc706.runs/impl_1/system_top.sysdef": no such file or directory
while executing
"file copy -force $project_name.runs/impl_1/system_top.sysdef $project_name.sdk/system_top.hdf"
invoked from within
"if [expr [get_property SLACK [get_timing_paths]] < 0] {
file copy -force $project_name.runs/impl_1/system_top.sysdef $project_name.sdk/system_top_..."
(procedure "adi_project_run" line 26)
invoked from within
"adi_project_run ad9467_fmc_zc706"
(file "system_project.tcl" line 14)
In order to know the exact error, I used the grep -i error projects/ad9467_fmc/zc706/ad9467_fmc_zc706_vivado.log
I found two errors (see the attached log file using grep):
ERROR: [DRC 23-20] Rule violation (NSTD-1) Unspecified I/O Standard - 45 out of 211 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT’……
INFO: [Vivado 12-3199] DRC finished with 2 Errors, 75 Warnings, 6 Advisories
ERROR: [Vivado 12-1345] Error(s) found during DRC. Bitgen not run.
ERROR: [Common 17-39] 'write_bitstream' failed due to earlier errors.
error copying "ad9467_fmc_zc706.runs/impl_1/system_top.sysdef": no such file or directory
Do you have any suggestion for this error? Do you recommend to use vivado software in order to solve this problem and generate bit file without make?
2)Concerning the second question about the spi pins of the interposer AD9467:
As you commented, I could use the other USB SPI interface (usb appears in *connections of the interposer squeme) but it seems to be connected to same pins of the spi interposer. My question: If there is no hardware connection to the ZC706 with the USB SPI connections, could I reconnect bridging in the interposer boar in order to connect spi to the ZC706?
Thanks
Regards
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Re: AD5933 - Impedance vs adaptative MCLK
Hi ymermoud,
thank you for your interesting post. Could you send me your circuit diagram or could you post it here, please?
Thank you for your help.
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Re: temperature sensor in ADIS16488
How would you define "significant?" There are limits to how well the bahaviors can be observed and corrected for. When considering what these sensors support before calibration, 0.1 deg/sec is 20-50x better. Probably need to understand the basis of your expectation a bit more. Also, it seems like the temp is changing by more that 25C, which seems pretty large. Are there any other sources of heat nearby?
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ADALM1000 Calibration
Hi,
I just started using ADALM1000 and i have problem calibrating the device. When i connect CHA or CHB to GND i should measure a nearly zero voltage which will be the offset voltage. But instead i measure more than 0.3V which is huge compared to the mentioned value in this guide: ADALM1000 DC Voltmeter: [Analog Devices Wiki]
If i use this 0.3V as my offset the measurements is not accurate
I updated my m1k firmware to 2.06 and i reseted the calibration file using the smu tool on the device multiple times but still stuck.
thanks,
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Re: Controlling an AD5790 using RPi3 & linux iio driver
I don't think that you need to patch the driver in order to can probe it using device trees.
The first issue is your compatible string:
compatible = "adi,a5791";
Try "ad5791".
You need to also define the "vdd" and "vss" regulators. Take a look here for an example: AD5446 IIO DAC Linux Driver [Analog Devices Wiki]
Dragos
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Re: Can't get gr-iio loaded in Linux using https://wiki.analog.com/resources/tools-software/linux-software/gnuradio
Well, I guess I spoke too soon, as least in part. I was able to get
gnuradio installed on my Windows 7 machine using VMWare 10. But, I'm not
sure how to load GQRX without messing it up. BUT, and here is another
problem, I did exactly the same thing on a loaded Dell XPS 13 laptop
running Windows 10 and VMWare 12, and I could not get it to load. This
actually happened before. I did exactly the same thing, but, after entering
pybombs prefix init -a defalt prefix/default/ -R gnuradio-default,
the computer ran for about an hour and all looked good until the very
end. At that point, I got, at the very end:
Scanning dependencies of target blocksswig2
Building CXX object
gr-blocks/swig/CMakeFiles/_blocks_swig2.dir/blocks_swig2PYTHON_wrap.cxx.o
Linking CXX shared module blocksswig2.so
Built target blocksswig2
Built target blocks_swig0_swig_doc
Built target blocksswig0_swig_tag
Built target blocks_swig0_gr_blocks_swig_a6e57
Scanning dependencies of target blocksswig0
Building CXX object
gr-blocks/swig/CMakeFiles/_blocks_swig0.dir/blocks_swig0PYTHON_wrap.cxx.o
c++: internal compiler error: Killed (program cc1plus)
Please submit a full bug report,
with preprocessed source if appropriate.
See <file:///usr/share/doc/gcc-6/README.Bugs> for instructions.
gr-blocks/swig/CMakeFiles/_blocks_swig0.dir/build.make:70: recipe for
target
'gr-blocks/swig/CMakeFiles/_blocks_swig0.dir/blocks_swig0PYTHON_wrap.cxx.o'
failed
make[2]: ***
Error 4
CMakeFiles/Makefile2:2907: recipe for target
'gr-blocks/swig/CMakeFiles/_blocks_swig0.dir/all' failed
make[1]: *** Error 2
Makefile:160: recipe for target 'all' failed
make: *** Error 2
PyBOMBS.Packager.source - ERROR - Build failed. See output above for
error messages.
PyBOMBS.Packager.source - ERROR - Problem occurred while building
package gnuradio:
Build failed.
PyBOMBS.install_manager - ERROR - Error installing package gnuradio.
Aborting.
edtroy@ubuntu:~$
What is wrong? How do I fix this? It is either because of Windows 10 or
VMWare 12, but I am not sure which.
Thanks,
Ed
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ADALM2000 Matlab support package
Hello,
Do you have plan to be released MATLAB(and Simlink) Support package?
ADALM1000 has the support package.
I would like to know that ADALM2000 will be supported by MATLAB.
Best regards,
Jun
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Re: aduc7061 borken ports pin3-4
During the power on i keep in reset the uC.
After it leave the reset to "1"
In this way works.
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Re: hi,i want to know where i can find avnet board definition files in vivado for AD9361+ZC7035?
Hi,
Look at Building HDL [Analog Devices Wiki] .
The easiest way is to use make
Andrei
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Re: Building HDL AD9467 FMC-ZC706 in Vivado 2016.2
1) the system_wrapper.v is generated automatically and can not be changed. As the ports mentioned (i2s_bclk (i2s_bclk)...)
.i2s_sdata_in (i2s_sdata_in),) are defined in the system_top.v, the error appears because they are not defined in system_wrapper.v . If I can not remove these ports form system_top.v, how could be possible to generate the system_wrapper.v with all of them? I tried to copy/ pase with a new file when is generating with no suscess
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Re: (ADV7612)Can ADV7612 support TDM, I2S ,Higher than 96kHz, 5.1CH, 24bits?
Hi Jeyasudha.M
Our customer are waiting your answer for long time.
Please check about this.
Best regards
Kawa
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Re: Links between 2 ADAU1701
Thanks Bob,
The hardware connections to run the 2 dsp should be OK.
I hope David Tribb if he reads the post give me a confirmation.
Setting the parameters as you showed in the image should be all right, I do not have to do
anything else, do not I have to manipulate any register I suppose?
The concept is as follows:
DSP1 performs its but, DSP2 reset is held high through RPULL resistor, when DSP1 terminated
through MP2 low DSP2 reset.
DSP2 already has the clock coming from DSP1 MP11 and performs its but.
Thanks for the advice on the filters between DAC0 and ADC0.
What I can not do with SigmaStudio is to measure the duration of a push of a button
and accordingly do 2 different operations, in ASM with a few lines of code this measurement
is simple but with SigmaStudio?
Suppose you use S6 and the D5 and D6 LEDs to measure how long you hold down S6.
If S6 is pressed and released in a time between 200 and 500 milliseconds, turn on the D5 LED.
If S6 is pressed and released over 500 milliseconds turn on D6.
With SigmaStudio you can do it?
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Re: ADV7480 I2C behavior
Hi,
As per expert comment, hope that it will respond with an ACK.
Best Regards,
Jeyasudha.M
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Re: AD9371
Hi,
What carrier are you using?
HDL Architecture [Analog Devices Wiki]
HDL Architecture [Analog Devices Wiki] and a example of how to modify the hdl design Adding FIR filters in a fmcomms2 design [Analog Devices Wiki], this example is for Xilinc zc706 carrier.
Andrei
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ADUM2401 Output rise / fall time (10% to 90%)
I read the ADUM2401 data sheet.
Data Sheet ADuM2400/ADuM2401/ADuM2402 Rev. F
http://www.analog.com/media/en/technical-documentation/data-sheets/ADuM2400_2401_2402.pdf
Output rise / fall time (10% to 90%) is expressed as 3 nS at 3 V power supply voltage.
Please show me the worst value (the slowest) of this value.
Output rise / fall time (10% to 90%) is expressed as 3 nS at 3 V power supply voltage.
Please show me the worst value (the slowest) of this value.
My customers refer to the values for design, so the value does not have to be the guaranteed value.
Best regards
Best regards
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Re: Building HDL AD9467 FMC-ZC706 in Vivado 2016.2
If they not defined in the system_wrapper, than those definitions do not exist anymore, you can delete them.
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Re: EVAL-AD7147EBZ "USB communication failed" problem
This is usually a USB driver problem, Uninstalling the software and driver, rebooting the PC, reinstalling the software, rebooting PC is known to fix it.
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